Vitesse Semiconductor and Zarlink Semiconductor have released a joint reference design that delivers synchronization needed to deliver scalable, higher bandwidth communication services over packet-based networks.
The reference design speeds development time of next-generation network products, enabling customers to leverage Vitesse and Zarlink synchronization and timing expertise and shorten time-to-market.
Also, the design allows the flexibility to upgrade designs to IEEE 1588v2 for wireless technologies, such as WCDMA-TDD, CDMA2000 and Mobile Wimax.
The technology used is based on Vitesse’s Carrier Ethernet Gigabit PHY and Zarlink’s Synchronous Ethernet system synchronizer.
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